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A Design Methodology for Embedded Systems based on Multiple Processors., , , and . DIPES, volume 189 of IFIP Conference Proceedings, page 33-42. Kluwer, (2000)An Experimental Evaluation of Combination of Features on the IPNoSys., , and . SBESC, page 169-170. IEEE Computer Society, (2013)Design Space Exploration Using UTNoCs and Genetic Algorithm., , , and . SBESC, page 198-202. IEEE, (2016)DDR SDRAM Memory Controller for Digital TV Decoders., , , and . SBESC, page 78-82. IEEE Computer Society, (2011)Design Flow of a Dedicated Computer Cluster Customized for a Distributed Genetic Algorithm Application., , , and . ASAP, page 148-153. IEEE Computer Society, (2007)An investigation of latency prediction for NoC-based communication architectures using machine learning techniques., , , and . The Journal of Supercomputing, 75 (11): 7573-7591 (2019)Análise e Seleção de Redes de Interconexão para Síntese de Sistemas no Ambiente S3E2S., , , and . RITA, 8 (1): 83-101 (2001)System Synthesis for Multiprocessor Embedded Applications., , , and . DATE, page 697-702. IEEE Computer Society / ACM, (2000)Hierarchical and Multiple Switching NoC with Floorplan Based Adaptability., , , , , and . ARC, volume 7806 of Lecture Notes in Computer Science, page 179-184. Springer, (2013)Design space exploration comparing homogeneous and heterogeneous network-on-chip architectures., , , , and . SBCCI, page 190-195. ACM, (2005)