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MPA: Parallelizing an Application onto a Multicore Platform Made Easy., , , , , and . IEEE Micro, 29 (3): 31-39 (2009)Exploring parallelizations of applications for MPSoC platforms using MPA., , , and . DATE, page 1148-1153. IEEE, (2009)5nm: Has the time for a device change come?, , , , , , , and . ISQED, page 275-277. IEEE, (2016)Impact of device and interconnect process variability on clock distribution., , , , , , and . ICICDT, page 1-4. IEEE, (2015)Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies., , , , , , , , , and 6 other author(s). ESSDERC, page 102-105. IEEE, (2014)TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes., , , , , , , , , and 2 other author(s). DAC, page 24:1-24:6. ACM, (2013)Design Technology co-optimization for N10., , , , , , , , , and 18 other author(s). CICC, page 1-8. IEEE, (2014)Impact of interconnect multiple-patterning variability on SRAMs., , , , , , , , and . DATE, page 609-612. ACM, (2015)Runtime Scheduling for Video Decoding on Heterogeneous Architectures., , , , , and . RTNS, page 195-204. (2011)Multi-Objective Genetic Algorithm for Task Assignment on Heterogeneous Nodes., , and . Int. J. Digital Multimedia Broadcasting, (2012)