PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Massengill, Lloyd W."

Author of the publication

copydeleteadd this publication to your clipboard
Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology.

, , , , , , and . IRPS, page 1-5. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Tim W{\"{u}}rtele

Tim W{\"{u}}rtele

Kent W. Stewart

Tim W{\"{u}}rtele

Dipl.-Ing. W. Halter University of Stuttgart

 

Other publications of authors with the same name

Multi-cell soft errors at the 16-nm FinFET technology node., , , , , , and . IRPS, page 4. IEEE, (2015)Alpha Particle Soft-Error Rates for D-FF Designs in 16-Nm and 7-Nm Bulk FinFET Technologies., , , , , , and . IRPS, page 1-5. IEEE, (2019)Evaluation on flip-flop physical unclonable functions in a 14/16-nm bulk FinFET technology., , , , , , , and . IRPS, page 1. IEEE, (2018)Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology., , , , , , and . IRPS, page 1-5. IEEE, (2019)The sensitivity of radiation-induced leakage to STI topology and sidewall doping., , , , , , and . Microelectronics Reliability, 51 (5): 889-894 (2011)Design Technique for Mitigation of Soft Errors in Differential Switched-Capacitor Circuits., , , , and . IEEE Trans. on Circuits and Systems, 55-II (9): 838-842 (2008)An analog neural hardware implementation using charge-injection multipliers and neutron-specific gain control., and . IEEE Trans. Neural Networks, 3 (3): 354-362 (1992)Weight decay and resolution effects in feedforward artificial neural networks., and . IEEE Trans. Neural Networks, 2 (1): 168-170 (1991)Designing soft-error-aware circuits with power and speed optimization., , , , and . IRPS, page 5-1. IEEE, (2018)Impact of supply voltage and particle LET on the soft error rate of logic circuits., , , , , , and . IRPS, page 4. IEEE, (2018)