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Disambiguation of "Khanpour, Mehdi"

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An 8.5-11.5-Gbps SONET Transceiver With Referenceless Frequency Acquisition.

, , , , , , and . J. Solid-State Circuits, 48 (8): 1875-1884 (2013)

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Mehdi Tavakoli University of Stuttgart

 

Other publications of authors with the same name

A 40 nm CMOS 195 mW/55 mW Dual-Path Receiver AFE for Multi-Standard 8.5-11.5 Gb/s Serial Links., , , , , , , , and . J. Solid-State Circuits, 50 (2): 426-439 (2015)CMOS SOCs at 100 GHz: System Architectures, Device Characterization, and IC Design Examples., , , , , , , , , and 1 other author(s). ISCAS, page 1971-1974. IEEE, (2007)A 195mW / 55mW dual-path receiver AFE for multistandard 8.5-to-11.5 Gb/s serial links in 40nm CMOS., , , , , , , , and . ISSCC, page 34-35. IEEE, (2013)65-nm CMOS, W-Band Receivers for Imaging Applications., , , , and . CICC, page 749-752. IEEE, (2007)An 8.5-11.5-Gbps SONET Transceiver With Referenceless Frequency Acquisition., , , , , , and . J. Solid-State Circuits, 48 (8): 1875-1884 (2013)An 8.5-11.5Gbps SONET transceiver with referenceless frequency acquisition., , , , and . CICC, page 1-4. IEEE, (2012)A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission., , , , , , , , , and 5 other author(s). J. Solid-State Circuits, 47 (12): 3249-3260 (2012)A Wideband W-Band Receiver Front-End in 65-nm CMOS., , , and . J. Solid-State Circuits, 43 (8): 1717-1730 (2008)29.2 A transmitter and receiver for 100Gb/s coherent networks with integrated 4×64GS/s 8b ADCs and DACs in 20nm CMOS., , , , , , , , , and 6 other author(s). ISSCC, page 484-485. IEEE, (2017)A dual 23Gb/s CMOS transmitter/receiver chipset for 40Gb/s RZ-DQPSK and CS-RZ-DQPSK optical transmission., , , , , , , , , and 5 other author(s). ISSCC, page 330-332. IEEE, (2012)