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Disambiguation of "Vivet, Pascal"

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ITAC: A complete 3D integration test platform.

, , , , , , , , , , , , , , , , , , , and . 3DIC, page 1-4. IEEE, (2016)

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Pascal Gröger University of Stuttgart

Pascal Heinzelmann University of Stuttgart

Pascal Strobel University of Stuttgart

Pascal Goldschmid University of Stuttgart

Pascal Mossier University of Stuttgart

 

Other publications of authors with the same name

3D NoC using through silicon Via: An asynchronous implementation., , , and . VLSI-SoC, page 232-237. IEEE, (2011)Fast and accurate power annotated simulation: Application to a many-core architecture., , , and . PATMOS, page 191-198. IEEE, (2013)2D to 3D Test Pattern Retargeting Using IEEE P1687 Based 3D DFT Architectures., , , , , and . ISVLSI, page 386-391. IEEE Computer Society, (2014)Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs., , , , , , and . ISVLSI, page 609-614. IEEE Computer Society, (2015)On-line Power Optimization of Data Flow Multi-Core Architecture Based on Vdd-Hopping for Local Dynamic Voltage and Frequency Scaling., , , and . J. Low Power Electronics, 7 (2): 265-273 (2011)Fine-grain DVFS and AVFS techniques for complex SoC design: An overview of architectural solutions through technology nodes., , , , , and . ISCAS, page 1550-1553. IEEE, (2015)8.1 A 4×4×2 homogeneous scalable 3D network-on-chip circuit with 326MFlit/s 0.66pJ/b robust and fault-tolerant asynchronous 3D links., , , , , , , , , and 4 other author(s). ISSCC, page 146-147. IEEE, (2016)An Asynchronous Power Aware and Adaptive NoC Based Circuit., , , , , , , , , and 1 other author(s). J. Solid-State Circuits, 44 (4): 1167-1177 (2009)ITAC: A complete 3D integration test platform., , , , , , , , , and 10 other author(s). 3DIC, page 1-4. IEEE, (2016)Thermal performance of CoolCube™ monolithic and TSV-based 3D integration processes., , , , , , and . 3DIC, page 1-5. IEEE, (2016)