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3DIP: An iterative partitioning tool for monolithic 3D IC., , , , and . 3DIC, page 1-5. IEEE, (2016)Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits., , , and . Microelectron. J., (2017)Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells., , , , , , , , , and 2 other author(s). ISVLSI, page 539-544. IEEE Computer Society, (2017)An Unbalanced Area Ratio Study for High Performance Monolithic 3D Integrated Circuits., , , and . ISVLSI, page 350-355. IEEE Computer Society, (2015)From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose., , , , , , , , and . 3DIC, page 1-5. IEEE, (2016)Intermediate BEOL process influence on power and performance for 3DVLSI., , , , , , , and . 3DIC, page TS1.3.1-TS1.3.5. IEEE, (2015)Merging PDKs to Build a Design Environment for 3D Circuits: Methodology, Challenges and Limitations., , , , , , and . 3DIC, page 1-5. IEEE, (2019)IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 79-97 (2021)A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool., , , , , , , , , and 6 other author(s). DATE, page 1192-1196. ACM, (2015)M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC., , , , , , and . DATE, page 1740-1745. IEEE, (2020)