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Disambiguation of "Santos, Cristiano"

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8.1 A 4×4×2 homogeneous scalable 3D network-on-chip circuit with 326MFlit/s 0.66pJ/b robust and fault-tolerant asynchronous 3D links.

, , , , , , , , , , , , , and . ISSCC, page 146-147. IEEE, (2016)

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Cristiano Guttà University of Stuttgart

Aldilene Santos Franca University of Stuttgart

Kevin Laranjeira dos Santos University of Stuttgart

Christine dos Santos Costa University of Stuttgart

Dr. Christine von Wantoch Rekowski-Santos Rivera University of Stuttgart

 

Other publications of authors with the same name

Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs., , , , , , and . ISVLSI, page 609-614. IEEE Computer Society, (2015)Incremental timing optimization for automatic layout generation., , , and . ISCAS (4), page 3567-3570. IEEE, (2005)Efficient timing closure with a transistor level design flow., , , , and . VLSI-SoC, page 312-315. IEEE, (2007)8.1 A 4×4×2 homogeneous scalable 3D network-on-chip circuit with 326MFlit/s 0.66pJ/b robust and fault-tolerant asynchronous 3D links., , , , , , , , , and 4 other author(s). ISSCC, page 146-147. IEEE, (2016)A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures., , , , , , , and . VLSI-SoC, volume 240 of IFIP, page 25-39. Springer, (2005)A New Transistor-Level Layout Generation Strategy for Static CMOS Circuits., , and . ICECS, page 660-663. IEEE, (2006)Graphite-based heat spreaders for hotspot mitigation in 3D ICs., , , , , and . 3DIC, page TS10.4.1-TS10.4.4. IEEE, (2015)Using TSVs for thermal mitigation in 3D circuits: Wish and truth., , , , , , , , , and 1 other author(s). 3DIC, page 1-8. IEEE, (2014)Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells., , , , , , , , , and 2 other author(s). ISVLSI, page 539-544. IEEE Computer Society, (2017)Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs., , , , , , , and . DATE, page 495-500. ACM, (2015)