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UnSync-CMP: Multicore CMP Architecture for Energy-Efficient Soft-Error Reliability.

, , , , and . IEEE Trans. Parallel Distrib. Syst., 25 (1): 254-263 (2014)

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Static Analysis of Register File Vulnerability., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (4): 607-616 (2011)UnSync: A Soft Error Resilient Redundant Multicore Architecture., , , , and . ICPP, page 632-641. IEEE Computer Society, (2011)An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs., , , , and . DATE, page 402-408. IEEE Computer Society, (2002)Automatic generation of operation tables for fast exploration of bypasses in embedded processors., , , , , and . DATE, page 1197-1202. European Design and Automation Association, Leuven, Belgium, (2006)Stack data management for Limited Local Memory (LLM) multi-core processors., , and . ASAP, page 231-234. IEEE Computer Society, (2011)Operation tables for scheduling in the presence of incomplete bypassing., , , and . CODES+ISSS, page 194-199. ACM, (2004)Smart driver for power reduction in next generation bistable electrophoretic display technology., , and . CODES+ISSS, page 197-202. ACM, (2007)Languages Must Expose Memory Heterogeneity., , , and . MEMSYS, page 251-256. ACM, (2016)Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors., , and . DATE, page 1190-1195. ACM, (2008)Software Approaches for In-time Resilience., and . DAC, page 197. ACM, (2019)