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Disambiguation of "Murali, Srinivasan"

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Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors.

, , , , , , and . IEEE Trans. VLSI Syst., 15 (8): 869-880 (2007)

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Prashanth Srinivasan University of Stuttgart

 

Other publications of authors with the same name

Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips., , , , , , , and . VLSI-SoC, page 158-163. IEEE, (2006)Computing Accurate Performance Bounds for Best Effort Networks-on-Chip., , , , , and . IEEE Trans. Computers, 62 (3): 452-467 (2013)Interest Based Collaboration Framework., , and . WETICE, page 75-81. IEEE Computer Society, (1997)Timing-Error-Tolerant Network-on-Chip Design Methodology., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (7): 1297-1310 (2007)An Application-Specific Design Methodology for On-Chip Crossbar Generation., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (7): 1283-1296 (2007)SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (12): 1987-2000 (2010)×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip., , , and . DATE, page 884-889. IEEE Computer Society, (2004)3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks., , , and . 3D Integration for NoC-based SoC Architectures, Springer, (2011)Temperature-aware processor frequency assignment for MPSoCs using convex optimization., , , , , and . CODES+ISSS, page 111-116. ACM, (2007)A Wearable Device for Physical and Emotional Health Monitoring., , and . CinC, page 121-124. www.cinc.org, (2015)