PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Chopra, Kaviraj"

Author of the publication

copydeleteadd this publication to your clipboard
Computing the Soft Error Rate of a Combinational Logic Circuit Using Parameterized Descriptors.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (3): 468-479 (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Chopra, Kaviraj
add a person with the name Chopra, Kaviraj
 

Other publications of authors with the same name

Fast Statistical Static Timing Analysis Using Smart Monte Carlo Techniques., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (6): 852-865 (2011)Statistical Timing Based Optimization using Gate Sizing., , and . DATE, page 400-405. IEEE Computer Society, (2005)Efficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic., , and . VLSI Design, page 240-. IEEE Computer Society, (2004)CAD tools for variation tolerance., and . DAC, page 766. ACM, (2005)A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (2): 272-285 (2008)A Framework for Battery-Aware Sensor Management., , , and . DATE, page 962-967. IEEE Computer Society, (2004)A new statistical max operation for propagating skewness in statistical timing analysis., , , and . ICCAD, page 237-243. ACM, (2006)Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation., , , , and . ICCAD, page 1023-1028. IEEE Computer Society, (2005)Implicit pseudo boolean enumeration algorithms for input vector control., and . DAC, page 767-772. ACM, (2004)Circuit optimization using statistical static timing analysis., , , and . DAC, page 321-324. ACM, (2005)