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Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques.

, , , , , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 414-423. Springer, (2002)

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A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme., , , , , , , , and . FPGA, page 248. ACM, (2003)The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA., , , , , , , , and . ACM Great Lakes Symposium on VLSI, page 141-144. ACM, (2004)A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits., , , , , and . IEEE Trans. VLSI Syst., 15 (9): 1051-1054 (2007)A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA., , , , , , , and . Engineering of Reconfigurable Systems and Algorithms, page 181-187. CSREA Press, (2003)Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes., , , , , , , and . FPT, page 182-188. IEEE, (2002)Silicon germanium programmable circuits for gigahertz applications., , , , , , , , and . IET Circuits, Devices & Systems, 1 (1): 27-33 (2007)The gigahertz FPGA: design consideration and applications., , , , , , , , , and . FPGA, page 248. ACM, (2004)Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques., , , , , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 414-423. Springer, (2002)A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology., , , , , , , , , and 7 other author(s). J. Solid-State Circuits, 47 (8): 1828-1841 (2012)Multi-ghz Sige Bicmos Fpgas with New Architecture and Novel Power Management Techniques., , , , , , , and . Journal of Circuits, Systems, and Computers, 14 (2): 179-194 (2005)