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Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion Using IDW.

, , , , , and . IEEE Trans. Circuits Syst. Video Techn., 26 (11): 2093-2108 (2016)

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Comparing tightly and loosely coupled mesochronous synchronizers in a NoC switch architecture., , , , and . NOCS, page 244-249. IEEE Computer Society, (2009)Optimized active and power-down mode refresh control in 3D-DRAMs., , , , and . VLSI-SoC, page 1-6. IEEE, (2014)Lightweight virtual memory support for many-core accelerators in heterogeneous embedded SoCs., , and . CODES+ISSS, page 45-54. IEEE, (2015)Combination of hybrid energy harvesters with MEMS piezoelectric and nano-Watt radio wake up to extend lifetime of system for wireless sensor nodes., , , , and . ARCS Workshops, VDE-Verlag, (2013)Simultaneous memory and bus partitioning for SoC architectures., , , , and . SoCC, page 125-128. IEEE, (2005)A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits., , , , , , , and . J. Low Power Electronics, 6 (1): 44-55 (2010)Performability/Energy Tradeoff in Error-Control Schemes for On-Chip Networks., , , , and . IEEE Trans. VLSI Syst., 18 (1): 1-14 (2010)Memory energy minimization by data compression: algorithms, architectures and implementation., , , and . IEEE Trans. VLSI Syst., 12 (3): 255-268 (2004)Variability compensation for full-swing against low-swing on-chip communication., , and . IET Computers & Digital Techniques, 5 (5): 355-365 (2011)Application-Adaptive Guardbanding to Mitigate Static and Dynamic Variability., , and . IEEE Trans. Computers, 63 (9): 2160-2173 (2014)