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Disambiguation of "Strano, Alessandro"

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Comparing tightly and loosely coupled mesochronous synchronizers in a NoC switch architecture.

, , , , and . NOCS, page 244-249. IEEE Computer Society, (2009)

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Other publications of authors with the same name

Self-Calibrating Source Synchronous Communication for Delay Variation Tolerant GALS Network-on-Chip Design., , , and . IJERTCS, 2 (4): 1-20 (2011)Contrasting multi-synchronous MPSoC design styles for fine-grained clock domain partitioning: the full-HD video playback case study., , , , and . NoCArc@MICRO, page 37-42. ACM, (2011)Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs., , , , and . DATE, page 679-684. IEEE, (2010)Ultra-low latency NoC testing via pseudo-random test pattern compaction., , , , and . ISSoC, page 1-6. IEEE, (2012)A library of dual-clock FIFOs for cost-effective and flexible MPSoC design., , and . ICSAMOS, page 20-27. IEEE, (2010)OSR-Lite: Fast and deadlock-free NoC reconfiguration framework., , , , , and . ICSAMOS, page 86-95. IEEE, (2012)Evaluation of GALS Methods in Scaled CMOS Technology: Moonrake Chip Experience., , , , , , , , and . IJERTCS, 3 (4): 1-18 (2012)Optimising pseudo-random built-in self-testing of fully synchronous as well as multisynchronous networks-on-chip., , , and . IET Computers & Digital Techniques, (2013)Cooperative Built-in Self-Testing and Self-Diagnosis of NoC Bisynchronous Channels., , , and . MCSoC, page 159-166. IEEE Computer Society, (2012)Exploiting Network-on-Chip structural redundancy for a cooperative and scalable built-in self-test architecture., , , , , and . DATE, page 661-666. IEEE, (2011)