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A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits.

L. Benini, A. Bocca, A. Bonanno, A. Macii, E. Macii, J. Nagel, C. Piguet, and M. Poncino. J. Low Power Electronics, 6 (1): 44-55 (2010)

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Univ. -Prof. Ph. D. Christian Holm University of Stuttgart

Efficient Lattice Boltzmann Algorithms for Colloids Undergoing ElectrophoresisM. Kuron. Universität Stuttgart, Master's thesis, (2015)

Christian León University of Stuttgart

Christian Hölzl University of Stuttgart

Christian Bartsch University of Stuttgart

Christian Semmler University of Stuttgart

Other publications of authors with the same name

Designing Energy-Efficient Arithmetic Operators Using Inexact Computing.L. Avinash, C. Enz, K. Palem, and C. Piguet. J. Low Power Electronics, 9 (1): 141-153 (2013)Low-Power Embedded Microprocessor Design.C. Piguet, T. Schneider, J. Masgonty, C. Arm, S. Durand, and M. Stegers. EUROMICRO, page 600-605. IEEE Computer Society, (1996)The First Quartz Electronic Watch.C. Piguet. PATMOS, volume 2451 of Lecture Notes in Computer Science, page 1-15. Springer, (2002)A New Paradigm for Developing Digital Systems Based on a Multi-Cellular Organization.D. Mange, S. Durand, E. Sanchez, A. Stauffer, G. Tempesti, P. Marchal, and C. Piguet. ISCAS, page 2193-2196. IEEE, (1995)Low-Power 32-bit Dual-MAC 120 µW/MHz 1.0 V icyflex1 DSP/MCU Core.C. Arm, S. Gyger, J. Masgonty, M. Morgan, J. Nagel, C. Piguet, F. Rampogna, and P. Volet. J. Solid-State Circuits, 44 (7): 2055-2064 (2009)Embryonics: The Birth of Synthetic Life.P. Marchal, P. Nussbaum, C. Piguet, S. Durand, D. Mange, E. Sanchez, A. Stauffer, and G. Tempesti. Towards Evolvable Hardware, volume 1062 of Lecture Notes in Computer Science, page 166-196. Springer, (1995)Energy harvesting and power management for autonomous sensor nodes.J. Christmann, E. Beigné, C. Condemine, J. Willemin, and C. Piguet. DAC, page 1049-1054. ACM, (2012)An Architecture Design Methodology for Minimal Total Power Consumption at Fixed Vdd and Vth.C. Schuster, C. Piguet, J. Nagel, and P. Farine. J. Low Power Electronics, 1 (1): 3-10 (2005)A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits.L. Benini, A. Bocca, A. Bonanno, A. Macii, E. Macii, J. Nagel, C. Piguet, and M. Poncino. J. Low Power Electronics, 6 (1): 44-55 (2010)A Scalable and Adaptive Technique for Compensating Process Variations and Controlling Leakage and Delay in the FPGA.B. Boroujeni, C. Piguet, and Y. Leblebici. J. Low Power Electronics, 9 (1): 1-8 (2013)

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Disambiguation of "Piguet, Christian"

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A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits.

Please choose a person to relate this publication to

Univ. -Prof. Ph. D. Christian Holm University of Stuttgart

Christian León University of Stuttgart

Christian Hölzl University of Stuttgart

Christian Bartsch University of Stuttgart

Christian Semmler University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Piguet, Christian"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits.

Please choose a person to relate this publication to

Univ. -Prof. Ph. D. Christian Holm University of Stuttgart

Christian León University of Stuttgart

Christian Hölzl University of Stuttgart

Christian Bartsch University of Stuttgart

Christian Semmler University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits.