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Disambiguation of "Gajski, Daniel D."

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RTOS Modeling for System Level Design.

, , and . Embedded Software for SoC, Kluwer / Springer, (2003)

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D. Marino

D. Roth

D. Inkermann

D. Roth

D. Roth

 

Other publications of authors with the same name

Automatic generation of cells for recurrence structures., and . DAC, page 306-313. ACM/IEEE, (1981)Accurate timed RTOS model for transaction level modeling., , , and . DATE, page 1333-1336. IEEE, (2010)New Strategies for System-Level Design.. DDECS, page 15. IEEE Computer Society, (2007)A performance evaluator for parameterized ASIC architectures., , and . EURO-DAC, page 66-71. IEEE Computer Society, (1994)Layout placement for sliced architecture., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 11 (1): 102-114 (1992)A transformation-based method for loop folding., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 13 (4): 439-450 (1994)Incremental hardware estimation during hardware/software functional partitioning., and . IEEE Trans. VLSI Syst., 3 (3): 459-464 (1995)Automatic TLM Generation for Early Validation of Multicore Systems., , , , and . IEEE Design & Test of Computers, 28 (3): 10-19 (2011)Electronic System-Level Synthesis Methodologies., , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (10): 1517-1530 (2009)Youn-Long Steve Lin, , and . Springer, (1992)