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Virtualizing on-chip distributed ScratchPad memories for low power and trusted application execution., , , and . Design Autom. for Emb. Sys., 17 (2): 377-409 (2013)A Unified code generation approach using mutation scheduling., , and . Code Generation for Embedded Processors, page 203-218. Kluwer, (1994)Fast Configurable-Cache Tuning With a Unified Second-Level Cache., , and . IEEE Trans. VLSI Syst., 17 (1): 80-91 (2009)Considering Run-Time Reconfiguration Overhead in Task Graph Transformations for Dynamically Reconfigurable Architectures., , and . FCCM, page 273-274. IEEE Computer Society, (2005)Cyberphysical-system-on-chip (CPSoC): a self-aware MPSoC paradigm with cross-layer virtual sensing and actuation., , , , and . DATE, page 625-628. ACM, (2015)COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC., and . DATE, page 700-705. European Design and Automation Association, Leuven, Belgium, (2006)Customizing Software Toolkits for Embedded Systems-On-Chip., , and . DIPES, volume 189 of IFIP Conference Proceedings, page 87-98. Kluwer, (2000)Data Cache Sizing for Embedded Processor Applications., , and . DATE, page 925-926. IEEE Computer Society, (1998)Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (12): 2904-2918 (2006)Data-Reuse-Driven Energy-Aware Cosynthesis of Scratch Pad Memory and Hierarchical Bus-Based Communication Architecture for Multiprocessor Streaming Applications., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (8): 1439-1452 (2008)