Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Introduction to the Special Issue on Testing, prototyping, and debugging of multi-core architectures., and . Journal of Systems Architecture - Embedded Systems Design, 61 (10): 600 (2015)A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template., , , and . ReCoSoC, page 31-37. Univ. Montpellier II, (2006)Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays., , and . J. Low Power Electronics, 7 (1): 29-40 (2011)A holistic approach for tightly coupled reconfigurable parallel processors., , , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 33 (1): 53-62 (2009)Symbolic inner loop parallelisation for massively parallel processor arrays., , , and . MEMOCODE, page 219-228. IEEE, (2014)An Architecture Description Language for Massively Parallel Processor Architectures., , , , , and . MBMV, page 11-20. Fraunhofer Institut für Integrierte Schaltungen, (2006)Generating Device-specific GPU Code for Local Operators in Medical Imaging., , , , and . IPDPS, page 569-581. IEEE Computer Society, (2012)Acceleration of Multiresolution Imaging Algorithms: A Comparative Study., , , , and . ASAP, page 211-214. IEEE Computer Society, (2009)A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing., , , , and . ASAP, page 331-340. IEEE Computer Society, (2006)Domain-specific augmentations for High-Level Synthesis., , , , , and . ASAP, page 173-177. IEEE Computer Society, (2014)