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Exploring RTOS issues with a high-level model of a reconfigurable SoC platform.

, , , , and . ReCoSoC, page 71-78. Univ. Montpellier II, (2005)

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Univ. -Prof. Dr. Daniel Weiskopf University of Stuttgart

Dataset for "How Deep Is Your Gaze? Leveraging Distance in Image-Based Gaze Analysis", , , and . Dataset, (2024)Related to: Maurice Koch, Nelusa Pathmanathan, Daniel Weiskopf, and Kuno Kurzhals.2024. How Deep Is Your Gaze? Leveraging Distance in Image-Based GazeAnalysis. In 2024 Symposium on Eye Tracking Research and Applications(ETRA ’24), June 04–07, 2024, Glasgow, United Kingdom. ACM, New York,NY, USA, 7 pages. doi: 10.1145/3649902.3653349.
 

Other publications of authors with the same name

Power consumption model for partial and dynamic reconfiguration., , , and . ReConFig, page 1-8. IEEE, (2012)A Dynamically Reconfigurable Architecture for Low-Power Multimedia Terminals., , , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 51-62. Kluwer, (2001)VLSI high level synthesis of fast exact least mean square algorithms based on fast FIR filters., , , and . ICASSP, page 671-674. IEEE Computer Society, (1997)DART: A Dynamically Reconfigurable Architecture Dealing with Future Mobile Telecommunications Constraints., , , and . IPDPS, IEEE Computer Society, (2002)Memory aspects in signal processing and HLS tool: Some results., , , and . EUSIPCO, page 1-4. IEEE, (1996)Asynchronous timing model for high-level synthesis of DSP applications., , and . EUSIPCO, page 1-4. IEEE, (1998)Parallelism Level Impact on Energy Consumption in Reconfigurable Devices., , , and . SIGARCH Computer Architecture News, 39 (4): 104-105 (2011)Flexible Interconnection Network for Dynamically and Partially Reconfigurable Architectures., , , , and . Int. J. Reconfig. Comp., (2010)Approximate nanophotonic interconnects., , , and . NOCS, page 9:1-9:7. ACM, (2019)Power consumption models for the use of dynamic and partial reconfiguration., , , and . Microprocessors and Microsystems - Embedded Hardware Design, 38 (8): 860-872 (2014)