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Disambiguation of "Verdier, François"

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Exploring RTOS issues with a high-level model of a reconfigurable SoC platform.

, , , , and . ReCoSoC, page 71-78. Univ. Montpellier II, (2005)

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Davi Francois University of Stuttgart

 

Other publications of authors with the same name

A high level synthesis algorithm including control constraints., , and . Microprocessing and Microprogramming, 35 (1-5): 271-278 (1992)Module relocation in Heterogeneous Reconfigurable Systems-on-Chip using the Xilinx Isolation Design Flow., , , and . ReConFig, page 1-6. IEEE, (2012)Exploring RTOS issues with a high-level model of a reconfigurable SoC platform., , , , and . ReCoSoC, page 71-78. Univ. Montpellier II, (2005)Towards a SystemC TLM based Methodology for Platform Design and IP Reuse: Application to Software Defined Radio., , , , and . ReCoSoC, page 131-138. Univ. Montpellier II, (2006)A methodology for inserting clock-management strategies in transaction-level models of systemon- chips., , , and . FDL, page 24-30. IEEE, (2015)Fast Stable Matching Algorithm using Asynchronous Parallel Programming Model., , and . CAMP, page 131-135. IEEE Computer Society, (2000)Very fast co-simulation model and accurate on-the-fly performance estimation methodology for heterogeneous MPSoC., and . SoCC, page 210-215. IEEE, (2014)Network-Aware Virtual Platform for the Verification of Embedded Software for Communications., , , , , , and . DSD, page 518-525. IEEE Computer Society, (2015)Mobile Terminals System-Level Memory Exploratio for Power and Performance Optimization., , , and . PATMOS, page 23-28. IEEE, (2018)Transaction level modelling of SCA compliant software defined radio waveforms and platforms PIM/PSM., , , and . DATE, page 966-971. EDA Consortium, San Jose, CA, USA, (2007)