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Resistive Memory-Based In-Memory Computing: From Device and Large-Scale Integration System Perspectives.

, , , , , , and . Adv. Intell. Syst., 1 (7): 1900068 (2019)

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Low cost power failure protection for MLC NAND flash storage systems with PRAM/DRAM hybrid buffer., , , and . DATE, page 859-864. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Cache coherence enabled adaptive refresh for volatile STT-RAM., , , , , and . DATE, page 1247-1250. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Energy efficient neural networks for big data analytics., , , , , and . DATE, page 1-2. European Design and Automation Association, (2014)Loadsa: A yield-driven top-down design method for STT-RAM array., , , and . ASP-DAC, page 291-296. IEEE, (2013)Reduction of data prevention cost and improvement of reliability in MLC NAND flash storage system., , , and . ICNC, page 259-263. IEEE, (2014)Neuromorphic computing: A SoC scaling path for the next decades., and . SoCC, page 290-291. IEEE, (2012)Low-Power Design of Emerging Memory Technologies., , , and . Handbook of Energy-Aware and Green Computing, Chapman and Hall/CRC, (2012)Accelerating generation of stochastic cyclone routes with GPU programming., and . Geoinformatics, page 1-5. IEEE, (2015)A Time, Energy, and Area Efficient Domain Wall Memory-Based SPM for Embedded Systems., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 35 (12): 2008-2017 (2016)A 1.0V 45nm nonvolatile magnetic latch design and its robustness analysis., , , , , , and . CICC, page 1-4. IEEE, (2011)