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Disambiguation of "Wilkerson, Chris"

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MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP.

, , , , and . MICRO, page 305-316. IEEE Computer Society, (2012)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Chris Bühler University of Stuttgart

Katrin Christ University of Stuttgart

M. Christmann

Chris Wanner University of Stuttgart

Kasper Christensen University of Stuttgart

 

Other publications of authors with the same name

The heterogeneous block architecture., , and . ICCD, page 386-393. IEEE Computer Society, (2014)Flexible associativity for DRAM caches., , , , and . CF, page 88-96. ACM, (2018)A 45 nm Resilient Microprocessor Core for Dynamic Variation Tolerance., , , , , , , , , and 1 other author(s). J. Solid-State Circuits, 46 (1): 194-208 (2011)MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP., , , , and . MICRO, page 305-316. IEEE Computer Society, (2012)Energy-Efficient and Metastability-Immune Timing-Error Detection and Instruction-Replay-Based Recovery Circuits for Dynamic-Variation Tolerance., , , , , , , and . ISSCC, page 402-403. IEEE, (2008)Improving DRAM Performance by Parallelizing Refreshes with Accesses., , , , , , and . CoRR, (2017)Runahead Execution: An Effective Alternative to Large Instruction Windows., , , and . IEEE Micro, 23 (6): 20-25 (2003)Improving DRAM performance by parallelizing refreshes with accesses., , , , , , and . HPCA, page 356-367. IEEE Computer Society, (2014)Improving cache performance using read-write partitioning., , , , and . HPCA, page 452-463. IEEE Computer Society, (2014)Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy., , , , , and . ASPLOS, page 737-749. ACM, (2017)