%0 Journal Article %1 journals/jsa/SorensenPSS17 %A Sørensen, Rasmus Bo %A Pezzarossa, Luca %A Schoeberl, Martin %A Sparsø, Jens %D 2017 %J Journal of Systems Architecture - Embedded Systems Design %K dblp %P 1-13 %T A resource-efficient network interface supporting low latency reconfiguration of virtual circuits in time-division multiplexing networks-on-chip. %U http://dblp.uni-trier.de/db/journals/jsa/jsa74.html#SorensenPSS17 %V 74

@article{journals/jsa/SorensenPSS17, added-at = {2018-11-30T00:00:00.000+0100}, author = {Sørensen, Rasmus Bo and Pezzarossa, Luca and Schoeberl, Martin and Sparsø, Jens}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/24b0520f0e84555496665c350e7d5f768/dblp}, ee = {https://www.wikidata.org/entity/Q54957374}, interhash = {a34210a0c0537215682c1d2903cc1720}, intrahash = {4b0520f0e84555496665c350e7d5f768}, journal = {Journal of Systems Architecture - Embedded Systems Design}, keywords = {dblp}, pages = {1-13}, timestamp = {2019-09-27T12:07:43.000+0200}, title = {A resource-efficient network interface supporting low latency reconfiguration of virtual circuits in time-division multiplexing networks-on-chip.}, url = {http://dblp.uni-trier.de/db/journals/jsa/jsa74.html#SorensenPSS17}, volume = 74, year = 2017 }