%0 Journal Article %1 journals/jssc/ChangMNBEDHJ08 %A Chang, Leland %A Montoye, Robert K. %A Nakamura, Yutaka %A Batson, Kevin %A Eickemeyer, Richard J. %A Dennard, Robert H. %A Haensch, Wilfried %A Jamsek, Damir %D 2008 %J J. Solid-State Circuits %K dblp %N 4 %P 956-963 %T An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches. %U http://dblp.uni-trier.de/db/journals/jssc/jssc43.html#ChangMNBEDHJ08 %V 43

@article{journals/jssc/ChangMNBEDHJ08, added-at = {2019-07-11T00:00:00.000+0200}, author = {Chang, Leland and Montoye, Robert K. and Nakamura, Yutaka and Batson, Kevin and Eickemeyer, Richard J. and Dennard, Robert H. and Haensch, Wilfried and Jamsek, Damir}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2d4c5f73d81a06efc0ef5be28a1c42e8e/dblp}, ee = {https://doi.org/10.1109/JSSC.2007.917509}, interhash = {34be6148091fba28eae367088e1f959c}, intrahash = {d4c5f73d81a06efc0ef5be28a1c42e8e}, journal = {J. Solid-State Circuits}, keywords = {dblp}, number = 4, pages = {956-963}, timestamp = {2019-09-27T06:09:31.000+0200}, title = {An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc43.html#ChangMNBEDHJ08}, volume = 43, year = 2008 }