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Dark silicon aware power management for manycore systems under dynamic workloads., , , , , , and . ICCD, page 509-512. IEEE Computer Society, (2014)Hardware/software partitioning and minimizing memory interface traffic., , , , and . EURO-DAC, page 226-231. IEEE Computer Society, (1994)Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation., , , , , and . PECCS, page 450-458. SciTePress, (2012)Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures., , , and . IEEE International Workshop on Rapid System Prototyping, page 143-149. IEEE Computer Society, (2007)Memristors' Potential for Multi-bit Storage and Pattern Learning., , and . EMS, page 450-455. IEEE, (2015)SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system., , , and . Design Autom. for Emb. Sys., 12 (1-2): 1-30 (2008)Modelling Environment for Heterogeneous Systems based on MoCs., , , and . FDL, page 291-303. ECSI, (2005)Scalability of network-on-chip communication architecture for 3-D meshes., , , , , , and . NOCS, page 114-123. IEEE Computer Society, (2009)A High Level Power Model for the Nostrum NoC., and . DSD, page 673-676. IEEE Computer Society, (2006)Rescuing healthy cores against disabled routers., , , , and . DFT, page 98-103. IEEE Computer Society, (2014)