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CMOS design of focal plane programmable array processors., , , , and . ESANN, page 57-62. (2001)A Programmable Imager for Very High Speed Cellular Signal Processing., , , , and . VLSI Signal Processing, 23 (2-3): 305-318 (1999)Highly linear 2.5-V CMOS ΣΔ modulator for ADSL+., , , , , , and . IEEE Trans. on Circuits and Systems, 51-I (1): 47-62 (2004)Data Matrix Code Recognition Using the Eye-RIS Vision System., , , , , , and . ISCAS, page 1214. IEEE, (2007)ACE16k: the third generation of mixed-signal SIMD-CNN ACE chips toward VSoCs., , , , , , , and . IEEE Trans. on Circuits and Systems, 51-I (5): 851-863 (2004)New Visual Sensors and Processors., , , , , , , , , and 3 other author(s). Spatial Temporal Patterns for Action-Oriented Perception in Roving Robots, volume 1 of Cognitive Systems Monographs, Springer, (2009)A statistical optimization-based approach for automated sizing of analog cells., , , and . ICCAD, page 594-597. IEEE Computer Society / ACM, (1994)An Improved Elementary Processing Unit For High-Density CNN-Based Mixed-Signal Microprocessors For Vision., , , and . Journal of Circuits, Systems, and Computers, 12 (6): 675-690 (2003)Retinal Processing Emulation in a Programmable 2-Layer Analog Array Processor CMOS Chip., , , , and . NIPS, page 1099-1106. MIT Press, (2002)Analog weight buffering strategy for CNN chips., , , , and . ISCAS (3), page 522-525. IEEE, (2003)