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Highly linear 2.5-V CMOS ΣΔ modulator for ADSL+., , , , , , and . IEEE Trans. on Circuits and Systems, 51-I (1): 47-62 (2004)Multirate Downsampling Hybrid CT/DT Cascade Sigma-Delta Modulators., and . IEEE Trans. on Circuits and Systems, 59-I (2): 285-294 (2012)Adaptive CMOS analog circuits for 4G mobile terminals - Review and state-of-the-art survey., , , , , , and . Microelectronics Journal, 40 (1): 156-176 (2009)Behavioral modeling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK., , , , , and . Integration, 41 (2): 269-280 (2008)A power-scalable concurrent cascade 2-2-2 SC ΣΔ modulator for Software Defined Radio., , , , , and . ISCAS, page 516-519. IEEE, (2012)Efficient Multi-rate Hybrid Continuous-Time/Discrete-Time Cascade 2-2 Sigma-Delta Modulators for Wideband Telecom., and . VLSI-SoC (Selected Papers), volume 379 of IFIP Advances in Information and Communication Technology, page 124-143. Springer, (2011)Description Languages and Tools for the Behavioural Simulation of SD Modulators: a Comparative Survey., , , , , and . FDL, page 121-133. ECSI, (2003)Non-ideal quantization noise shaping in switched-current bandpass Sigma-Delta modulators., , , and . ISCAS (2), page 476-479. IEEE, (1999)Adaptive CMOS LNAs for Beyond-3G RF Receivers - A Multi-standard GSM/WCDMA/BT/WLAN Case Study., , and . ISCAS, page 417-420. IEEE, (2009)Reconfiguration of cascade Sigma Delta modulators for multistandard GSM/Bluetooth/UMTS/WLAN transceivers., , , , , , and . ISCAS, IEEE, (2006)