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Behavioral modeling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK.

, , , , , and . Integration, 41 (2): 269-280 (2008)

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MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma, Delta Modulators., , , , , , and . DATE, page 150-155. IEEE Computer Society, (2004)A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time Sigma-Delta modulators., , , , , , and . ISCAS (4), page 620-623. IEEE, (2003)Effect of non-linear settling error on the harmonic distortion of fully-differential switched-current bandpass Sigma-Delta modulators., , , , and . ISCAS (1), page 340-343. IEEE, (2001)A SIMULINK Block Set for the High-Level Simulation of Multistandard Radio Receivers., , and . ISCAS, page 2950-2953. IEEE, (2007)Gaussian Pyramid: Comparative Analysis of Hardware Architectures., , , , , and . IEEE Trans. on Circuits and Systems, 64-I (9): 2308-2321 (2017)A 0.2-to-2MHz BW, 50-to-86dB SNDR, 16-to-22mW flexible 4th-order ΣΔ modulator with DC-to-44MHz tunable center frequency in 1.2-V 90-nm CMOS., , and . VLSI-SoC, page 47-52. IEEE, (2012)A 2.5-V Sigma-Delta modulator in 0.25-µm CMOS for ADSL., , , , and . ISCAS (3), page 301-304. IEEE, (2002)Top-down design of a xDSL 14-bit 4MS/s sigma-delta modulator in digital CMOS technology., , , , and . DATE, page 348-352. IEEE Computer Society, (2001)A 0.35µm CMOS 17-bit@40kS/s sensor A/D interface based on a programmable-gain cascade 2-1 Sigma Delta modulator., , , , , , , and . ISCAS (1), page 205-208. IEEE, (2004)Design of a 130-nm CMOS Reconfigurable Cascade Sigma Delta Modulator for GSM/UMTS/Bluetooth., , and . ISCAS, page 725-728. IEEE, (2007)