Author of the publication

A Variability-Aware Adaptive Test Flow for Test Quality Improvement.

, , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 33 (7): 1056-1066 (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Hatayama, Kazumi
add a person with the name Hatayama, Kazumi
 

Other publications of authors with the same name

Application of a Design for Delay Testability Approach to High Speed Logic LSIs., , , , and . Asian Test Symposium, page 112-115. IEEE Computer Society, (1997)Application of High-Quality Built-In Test to Industrial Designs., , , , , and . ITC, page 1003-1012. IEEE Computer Society, (2002)Path Clustering for Test Pattern Reduction of Variation-Aware Adaptive Path Delay Testing., , , , and . J. Electronic Testing, 32 (5): 601-609 (2016)A novel post-ATPG IR-drop reduction scheme for at-speed scan testing in broadcast-scan-based test compression environment., , , , , , , and . ICCAD, page 97-104. ACM, (2009)Innovative Test Practices in Japan., , , , , , , , , and 4 other author(s). VTS, page 1. IEEE, (2019)Session Abstract.. VTS, page 200-201. IEEE Computer Society, (2006)An Adaptive Test for Parametric Faults Based on Statistical Timing Information., , , , , , , and . Asian Test Symposium, page 151-156. IEEE Computer Society, (2009)Accelerated Test Points Selection Method for Scan-Based BIST., , and . Asian Test Symposium, page 359-. IEEE Computer Society, (1997)Enhanced Delay Test Generator for High-Speed Logic LSIs., , , , , and . ITC, page 161-165. IEEE Computer Society, (1989)Effective IR-drop reduction in at-speed scan testing using Distribution-Controlling X-Identification., , , , , , , , and . ICCAD, page 52-58. IEEE Computer Society, (2008)