Author of the publication

Non-volatile registers aware instruction selection for embedded systems.

, , , , and . RTCSA, page 1-9. IEEE Computer Society, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units., , , , and . ASP-DAC, page 316-321. IEEE, (2015)A lightweight progress maximization scheduler for non-volatile processor under unstable energy harvesting., , , , , , , and . LCTES, page 101-110. ACM, (2017)AIM: Fast and energy-efficient AES in-memory implementation for emerging non-volatile main memory., , , , , and . DATE, page 625-628. IEEE, (2018)In-memory AES Implementation for Emerging Non-Volatile Main Memory., , , and . ISVLSI, page 103. IEEE, (2019)ENZYME: An Energy-Efficient Transient Computing Paradigm for Ultralow Self-Powered IoT Edge Devices., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 37 (11): 2440-2450 (2018)Modeling and Optimization for Self-powered Non-volatile IoT Edge Devices with Ultra-low Harvesting Power., , , , and . ACM Trans. Cyber Phys. Syst., 3 (3): 32:1-32:26 (2019)3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systems., , , , and . CODES+ISSS, page 33:1-33:10. ACM, (2014)Checkpoint aware hybrid cache architecture for NV processor in energy harvesting powered systems., , , , , , , and . CODES+ISSS, page 22:1-22:10. ACM, (2016)Avoiding Data Inconsistency in Energy Harvesting Powered Embedded Systems., , , , , and . ACM Trans. Design Autom. Electr. Syst., 23 (3): 38:1-38:25 (2018)Wear-Leveling Aware Page Management for Non-Volatile Main Memory on Embedded Systems., , , , , and . IEEE Trans. Multi-Scale Computing Systems, 2 (2): 129-142 (2016)