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Disambiguation of "Wambacq, Piet"

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A 60-GHz 8-Way Phased-Array Front-End With T/R Switching and Calibration-Free Beamsteering in 28-nm CMOS.

, , , , , , , and . J. Solid-State Circuits, 53 (7): 2001-2011 (2018)

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Patrick Pietrantuono University of Stuttgart

 

Other publications of authors with the same name

F6: Mixed-signal/RF design and modeling in next-generation CMOS., , , and . ISSCC, page 510-511. IEEE, (2013)FinFET technology for analog and RF circuits., , , , , , , and . ICECS, page 182-185. IEEE, (2007)A 6x-oversampling 10GS/s 60GHz polar transmitter with 15.3% average PA efficiency in 40nm CMOS., , , and . ESSCIRC, page 348-351. IEEE, (2015)Analysis and White-Box Modeling of Weakly Nonlinear Time-Varying Circuits., , , and . DATE, page 10624-10629. IEEE Computer Society, (2003)Behavioral Modeling and Simulation of a Mixed Analog/Digital Automatic Gain Control Loop in a 5 GHz WLAN Receiver., , , , , and . DATE, page 10642-10649. IEEE Computer Society, (2003)Body Area UWB RAKE Receiver Communication., , , and . ICC, page 4682-4687. IEEE, (2006)High-Frequency Nonlinear Amplifier Model for the Efficient Evaluation of Inband Distortion Under Nonlinear Load-Pull Conditions., , , and . DATE, page 586-590. IEEE Computer Society, (2002)A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS., , , , and . J. Solid-State Circuits, 44 (3): 874-882 (2009)An Incremental-Charge-Based Digital Transmitter With Built-in Filtering., , , and . J. Solid-State Circuits, 50 (12): 3065-3076 (2015)A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS., , , , and . J. Solid-State Circuits, 45 (10): 2080-2090 (2010)