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Disambiguation of "Murali, Srinivasan"

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Designing Routing and Message-Dependent Deadlock Free Networks on Chips.

, , , , , , , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 337-355. Springer, (2006)

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Prashanth Srinivasan University of Stuttgart

 

Other publications of authors with the same name

Interest Based Collaboration Framework., , and . WETICE, page 75-81. IEEE Computer Society, (1997)Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips., , , , , , , and . VLSI-SoC, page 158-163. IEEE, (2006)×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip., , , and . DATE, page 884-889. IEEE Computer Society, (2004)A method for calculating hard QoS guarantees for Networks-on-Chip., , , , , and . ICCAD, page 579-586. ACM, (2009)Temperature-aware processor frequency assignment for MPSoCs using convex optimization., , , , , and . CODES+ISSS, page 111-116. ACM, (2007)Designing application-specific networks on chips with floorplan information., , , , , , , and . ICCAD, page 355-362. ACM, (2006)A Wearable Device for Physical and Emotional Health Monitoring., , and . CinC, page 121-124. www.cinc.org, (2015)3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks., , , and . 3D Integration for NoC-based SoC Architectures, Springer, (2011)Timing-Error-Tolerant Network-on-Chip Design Methodology., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (7): 1297-1310 (2007)An Application-Specific Design Methodology for On-Chip Crossbar Generation., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (7): 1283-1296 (2007)