Author of the publication

Implementation of multi-standard video decoding algorithms on a coarse-grained reconfigurable multimedia processor.

, , , , , , , , and . ISCAS, page 897-900. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Optimizing Spatial Mapping of Nested Loop for Coarse-Grained Reconfigurable Architectures., , , , and . IEEE Trans. VLSI Syst., 23 (11): 2581-2594 (2015)Energy Management on Battery-Powered Coarse-Grained Reconfigurable Platforms., , , and . IEEE Trans. VLSI Syst., 23 (12): 3085-3098 (2015)A Hybrid Reconfigurable Architecture and Design Methods Aiming at Control-Intensive Kernels., , , , and . IEEE Trans. VLSI Syst., 23 (9): 1700-1709 (2015)SimRPU: A Simulation Environment for Reconfigurable Architecture Exploration., , , , , and . IEEE Trans. VLSI Syst., 22 (12): 2635-2648 (2014)Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture., , , , , , and . SCIENCE CHINA Information Sciences, 56 (11): 1-20 (2013)Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system., , , , , and . SCIENCE CHINA Information Sciences, 57 (8): 1-14 (2014)Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor., , , , , , , , and . SCIENCE CHINA Information Sciences, 57 (8): 1-14 (2014)Affine transformations for communication and reconfiguration optimization of loops on CGRAs., , , and . ISCAS, page 2541-2544. IEEE, (2013)SPC: An Approach to Guarantee Performance in Cost Oriented Mapping Algorithm for NoC Architectures., , , , and . NAS, page 187-190. IEEE Computer Society, (2013)Joint affine transformation and loop pipelining for mapping nested loop on CGRAs., , , , and . DATE, page 115-120. ACM, (2015)