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Evaluating the security of logic encryption algorithms.

, , and . HOST, page 137-143. IEEE Computer Society, (2015)

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Specification and encoding of transaction interaction properties., , and . Formal Methods in System Design, 39 (2): 144-164 (2011)Efficient Microarchitecture Modeling and Path Analysis for Real-Time Software., , and . RTSS, page 298-307. IEEE Computer Society, (1995)Cache modeling for real-time software: beyond direct mapped instruction caches., , and . RTSS, page 254-263. IEEE Computer Society, (1996)Certified Timing Verification and the Transition Delay of a Logic Circuit., , , and . DAC, page 549-555. (1992)Reverse engineering digital circuits using functional analysis., , , , , and . DATE, page 1277-1280. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs., , , , and . ICCAD, page 286-292. IEEE Computer Society, (2001)Incremental CAD., , , and . ICCAD, page 236-243. IEEE Computer Society, (2000)Achieving Structural and Composable Modeling of Complex Systems., , , and . IPDPS Next Generation Software Program - NSFNGS - PI Workshop, IEEE Computer Society, (2004)Optimization of embedded DSP programs using post-pass data-flow analysis., , , and . ICASSP, page 695-698. IEEE Computer Society, (1997)Post-silicon fault localisation using maximum satisfiability and backbones., , and . FMCAD, page 63-66. FMCAD Inc., (2011)