PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Mai, Ken"

Author of the publication

copydeleteadd this publication to your clipboard
A 275 Gbps AES encryption accelerator using ROM-based S-boxes in 65nm.

, , , and . CICC, page 1-4. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

PD Dr. Martin Kenner University of Stuttgart

Finn Kenklies University of Stuttgart

Karolin Tampe-Mai University of Stuttgart

Thomas Maier

Thomas Maier

 

Other publications of authors with the same name

SCAN-PUF: A low overhead Physically Unclonable Function from scan chain power-up states., , , and . ITC, page 1-8. IEEE Computer Society, (2013)Deeply hardware-entangled reconfigurable logic and interconnect., , , and . ReConFig, page 1-8. IEEE, (2015)Secure hardware-entangled field programmable gate arrays., , , , and . J. Parallel Distrib. Comput., (2019)A Technology-Agnostic Simulation Environment (TASE) for iterative custom IC design across processes., , , , and . ICCD, page 523-528. IEEE Computer Society, (2009)Statistical Learning in Chip (SLIC)., , , , , , , and . ICCAD, page 664-669. IEEE, (2015)An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS., , , and . ESSCIRC, page 65-68. IEEE, (2019)Variation-tolerant SRAM sense-amplifier timing using configurable replica bitlines., , , , , and . CICC, page 415-418. IEEE, (2008)An efficient reliable PUF-based cryptographic key generator in 65nm CMOS., and . DATE, page 1-6. European Design and Automation Association, (2014)Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime., , , , , , and . ICCD, page 94-101. IEEE Computer Society, (2012)Building Fast, Dense, Low-Power Caches Using Erasure-Based Inline Multi-bit ECC., , , , , and . PRDC, page 98-107. IEEE Computer Society, (2013)