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Oxygen vacancy traps in Hi-K/Metal gate technologies and their potential for embedded memory applications., , , , , , , , , and 3 other author(s). IRPS, page 2. IEEE, (2015)Electrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips., , , , , , , , , and . CICC, page 799-804. IEEE, (2007)Three-Dimensional Dynamic Random Access Memories Using Through-Silicon-Vias., , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 373-384 (2016)Field Tolerant Dynamic Intrinsic Chip ID Using 32 nm High-K/Metal Gate SOI Embedded DRAM., , , , , , and . J. Solid-State Circuits, 48 (4): 940-947 (2013)A Self-Authenticating Chip Architecture Using an Intrinsic Fingerprint of Embedded DRAM., , , , , and . J. Solid-State Circuits, 48 (11): 2934-2943 (2013)A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45nm SOI CMOS., , , , , , , , , and 1 other author(s). ISSCC, page 406-407. IEEE, (2008)Dynamic intrinsic chip ID using 32nm high-K/metal gate SOI embedded DRAM., , , , , and . VLSIC, page 146-147. IEEE, (2012)