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High-throughput architecture and implementation of regular (2, dc) nonbinary LDPC decoders.

Y. Tao, Y. Park, and Z. Zhang. ISCAS, page 2625-2628. IEEE, (2012)

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Other publications of authors with the same name

A 4.68Gb/s belief propagation polar decoder with bit-splitting register file.Y. Park, Y. Tao, S. Sun, and Z. Zhang. VLSIC, page 1-2. IEEE, (2014)A Fully Parallel Nonbinary LDPC Decoder With Fine-Grained Dynamic Clock Gating.Y. Park, Y. Tao, and Z. Zhang. J. Solid-State Circuits, 50 (2): 464-475 (2015)High-Throughput Split-Tree Architecture for Nonbinary SCL Polar Decoder.Y. Tao, and C. Choi. CoRR, (2022)Efficient Post-Processors for Improving Error-Correcting Performance of LDPC Codes.Y. Tao, S. Sun, and Z. Zhang. CoRR, (2022)High-throughput architecture and implementation of regular (2, dc) nonbinary LDPC decoders.Y. Tao, Y. Park, and Z. Zhang. ISCAS, page 2625-2628. IEEE, (2012)Efficient in situ error detection enabling diverse path coverage.C. Chen, Y. Tao, and Z. Zhang. ISCAS, page 773-776. IEEE, (2013)An Automated FPGA-Based Framework for Rapid Prototyping of Nonbinary LDPC Codes.Y. Tao, and Q. Wu. ISCAS, page 1-5. IEEE, (2019)Efficient Post-Processors for Improving Error-Correcting Performance of LDPC Codes.Y. Tao, S. Sun, and Z. Zhang. IEEE Trans. on Circuits and Systems, 66-I (10): 4032-4043 (2019)An Automated FPGA-based Framework for Rapid Prototyping of Nonbinary LDPC Codes.Y. Tao, and Q. Wu. CoRR, (2022)DNC-Aided SCL-Flip Decoding of Polar Codes.Y. Tao, and Z. Zhang. GLOBECOM, page 1-6. IEEE, (2021)

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Disambiguation of "Tao, Yaoyu"

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High-throughput architecture and implementation of regular (2, dc) nonbinary LDPC decoders.

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Disambiguation of "Tao, Yaoyu"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML High-throughput architecture and implementation of regular (2, dc) nonbinary LDPC decoders.

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High-throughput architecture and implementation of regular (2, dc) nonbinary LDPC decoders.