PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Park, Henry"

Author of the publication

copydeleteadd this publication to your clipboard
A 180mW 56Gb/s DSP-Based Transceiver for High Density IOs in Data Center Switches in 7nm FinFET Technology.

, , , , , , , , , , , , , , , , , , and . ISSCC, page 118-120. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Sumee Park

Prof. Dr. Henry Schäfer University of Stuttgart

Univ. -Prof. Dr. Henry Strasdeit University of Stuttgart

Soo Yong Park University of Stuttgart

 

Other publications of authors with the same name

In Situ SRAM Static Stability Estimation in 65-nm CMOS., and . J. Solid-State Circuits, 48 (10): 2541-2549 (2013)Analysis of STT-RAM cell design with multiple MTJs per access., , , , , and . NANOARCH, page 53-58. IEEE Computer Society, (2011)A digitally-calibrated 10GS/s reconfigurable flash ADC in 65-nm CMOS., , , and . ISCAS, page 2443-2447. IEEE, (2013)A 180mW 56Gb/s DSP-Based Transceiver for High Density IOs in Data Center Switches in 7nm FinFET Technology., , , , , , , , , and 9 other author(s). ISSCC, page 118-120. IEEE, (2019)A body-voltage-sensing-based short pulse reading circuit for spin-torque transfer RAMs (STT-RAMs)., , , , , and . ISQED, page 275-282. IEEE, (2012)Nearly Exact Analytical Formulation of the DNL Yield of the Digital-to-Analog Converter., and . IEEE Trans. on Circuits and Systems, 59-II (9): 563-567 (2012)Male Adolescents' and Young Adults' Evaluations of Interracial Exclusion in Offline and Online Settings., , , , and . Cyberpsy., Behavior, and Soc. Networking, 22 (10): 641-647 (2019)Stability Estimation of a 6T-SRAM Cell Using a Nonlinear Regression., and . IEEE Trans. VLSI Syst., 22 (1): 27-38 (2014)A 3.8 mW/Gbps quad-channel 8.5-13 Gbps serial link with a 5-tap DFE and a 4-tap transmit FFE in 28 nm CMOS., , , , , , , , , and 3 other author(s). VLSIC, page 348-. IEEE, (2015)An INL Yield Model of the Digital-to-Analog Converter., and . IEEE Trans. on Circuits and Systems, 60-I (3): 582-592 (2013)