PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Bernardi, Paolo"

Author of the publication

copydeleteadd this publication to your clipboard
Facilitating Fault-Simulation Comprehension through a Fault-Lists Analysis Tool.

, , and . LASCAS, page 77-80. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

PD Dr. Paolo Malgaretti University of Stuttgart

Paolo Carlo Danesini University of Stuttgart

 

Other publications of authors with the same name

Test Considerations about the Structured ASIC Paradigm., and . DDECS, page 232-233. IEEE Computer Society, (2006)An Adaptive Low-Cost Tester Architecture Supporting Embedded Memory Volume Diagnosis., and . IEEE Trans. Instrumentation and Measurement, 61 (4): 1002-1018 (2012)An I-IP based approach for the monitoring of NBTI effects in SoCs., , , , , , and . IOLTS, page 15-20. IEEE Computer Society, (2009)Increasing the Fault Coverage of Processor Devices during the Operational Phase Functional Test., , , , and . J. Electronic Testing, 30 (3): 317-328 (2014)A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques., , , , , , and . J. Electronic Testing, 20 (1): 79-87 (2004)An Effective Technique for the Automatic Generation of Diagnosis-Oriented Programs for Processor Cores., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (3): 570-574 (2008)An effective approach for functional test programs compaction., , , , , and . DDECS, page 119-124. IEEE, (2016)Cumulative embedded memory failure bitmap display & analysis., , , , , , , and . DDECS, page 255-260. IEEE Computer Society, (2010)An effective approach to automatic functional processor test generation for small-delay faults., , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)An Efficient Method for the Test of Embedded Memory Cores during the Operational Phase., , , and . Asian Test Symposium, page 227-232. IEEE Computer Society, (2013)