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An effective approach to automatic functional processor test generation for small-delay faults.

, , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)

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On-line software-based self-test of the Address Calculation Unit in RISC processors., , , , , , , and . European Test Symposium, page 1-6. IEEE Computer Society, (2012)A SBST strategy to test microprocessors' Branch Target Buffer., , , , and . DDECS, page 306-311. IEEE, (2012)An enhanced FPGA-based low-cost tester platform exploiting effective test data compression for SoCs., , , , and . DDECS, page 258-263. IEEE Computer Society, (2009)An Adaptive Low-Cost Tester Architecture Supporting Embedded Memory Volume Diagnosis., and . IEEE Trans. Instrumentation and Measurement, 61 (4): 1002-1018 (2012)An Efficient Method for the Test of Embedded Memory Cores during the Operational Phase., , , and . Asian Test Symposium, page 227-232. IEEE Computer Society, (2013)An effective approach to automatic functional processor test generation for small-delay faults., , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)An effective methodology for on-line testing of embedded microprocessors., , , and . IOLTS, page 270-275. IEEE Computer Society, (2011)Automatic Generation of On-Line Test Programs through a Cooperation Scheme., , , , , and . MTV, page 13-18. IEEE Computer Society, (2012)A functional test algorithm for the register forwarding and pipeline interlocking unit in pipelined microprocessors., , , , , , and . IDT, page 1-6. IEEE, (2013)On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors., , , , , , , and . MTV, page 52-57. IEEE Computer Society, (2013)