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Cycle avoidance in 2D/3D bidirectional graphs using shortest-path dynamic programming network.

, , and . VLSI-SoC, page 354-358. IEEE, (2011)

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Comparative ODE benchmarking of unidirectional and bidirectional DP networks for 3D-IC., , and . VLSI-SoC, page 98-101. IEEE, (2011)Cycle avoidance in 2D/3D bidirectional graphs using shortest-path dynamic programming network., , and . VLSI-SoC, page 354-358. IEEE, (2011)Redressing timing issues for speed-independent circuits in deep submicron age., , and . DATE, page 1376-1381. IEEE, (2011)Novel Multi-Layer Network Decomposition boosting acceleration of multi-core algorithms., , , and . ASAP, page 249-252. IEEE Computer Society, (2013)On Computing Maximum Likelihood Phylogeny Using FPGA p., and . FPL, volume 3203 of Lecture Notes in Computer Science, page 1188. Springer, (2004)A neuro-inspired visual tracking method based on programmable system-on-chip platform., , , , and . Neural Computing and Applications, 30 (9): 2697-2708 (2018)On-Chip Systolic Networks for Real-Time Tracking of Pairwise Correlations Between Neurons in a Large-Scale Network., , , , and . IEEE Trans. Biomed. Engineering, 60 (1): 198-202 (2013)Power adaptive computing system design in energy harvesting environment., , , , and . ICSAMOS, page 33-40. IEEE, (2011)Agile frequency scaling for adaptive power allocation in many-core systems powered by renewable energy sources., , , , , and . ASP-DAC, page 298-303. IEEE, (2014)Throughput Maximization for Wave-pipelined Interconnects using Cascaded Buffers and Transistor Sizing., , , and . ISCAS, page 1293-1296. IEEE, (2009)