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Predicting the Performance of a 3D Processor-Memory Chip Stack.

, , , , , and . IEEE Design & Test of Computers, 22 (6): 540-547 (2005)

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Amdahl's figure of merit, SiGe HBT BiCMOS, and 3D chip stacking., , , , , , , , and . ICCD, page 202-207. IEEE, (2007)Thermal analysis for a SiGe HBT 40 watt 32 GHz clock 3D memory processor chip stack using diamond heat spreader layers., , , , , , , , , and 2 other author(s). 3DIC, page 1-7. IEEE, (2009)A three-dimensional DRAM using floating body cell in FDSOI devices., , , , , , and . DDECS, page 159-162. IEEE, (2012)Design of BiCMOS SRAMs for high-speed SiGe applications., , , , , , , , and . IET Circuits, Devices & Systems, 8 (6): 487-498 (2014)3D NOC for many-core processors., , , and . Microelectronics Journal, 42 (12): 1380-1390 (2011)Predicting the Performance of a 3D Processor-Memory Chip Stack., , , , , and . IEEE Design & Test of Computers, 22 (6): 540-547 (2005)A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration., , , , , and . IEEE Trans. VLSI Syst., 18 (6): 967-977 (2010)Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications., , , , , and . IET Circuits, Devices & Systems, 5 (3): 159-169 (2011)