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Disambiguation of "Mudge, Trevor N."

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DVS for On-Chip Bus Designs Based on Timing Error Correction

, , , , and . CoRR, (2007)

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Jan-Philipp Negel

Thin-disk multipass amplifier for fs pulses delivering 400 W of average and 2.0 GW of peak power for linear polarization as well as 235 W and 1.2 GW for radial polarization, , , , , , , and . Applied Physics. B, Lasers and optics, 123 (5): 156 (2017)

none

Alexander Naubert

Rodion Novkin University of Stuttgart

Dr. phil. Michael Nerurkar University of Stuttgart

 

Other publications of authors with the same name

Evaluating private vs. shared last-level caches for energy efficiency in asymmetric multi-cores., , and . ICSAMOS, page 191-198. IEEE, (2014)PEPSC: A Power-Efficient Processor for Scientific Computing., , , and . PACT, page 101-110. IEEE Computer Society, (2011)Using Graphics Processing Units in an LTE Base Station., , , , , , , and . Signal Processing Systems, 78 (1): 35-47 (2015)Sirius Implications for Future Warehouse-Scale Computers., , , , , , , , , and 1 other author(s). IEEE Micro, 36 (3): 42-53 (2016)Designing Future Warehouse-Scale Computers for Sirius, an End-to-End Voice and Vision Personal Assistant., , , , , , , , , and 3 other author(s). ACM Trans. Comput. Syst., 34 (1): 2:1-2:32 (2016)Impact of Future Technologies on Architecture., , , , , and . IEEE Micro, 36 (4): 48-56 (2016)ChipLock: support for secure microarchitectures., , and . SIGARCH Computer Architecture News, 33 (1): 134-143 (2005)The limits of instruction level parallelism in SPEC95 applications., , , and . SIGARCH Computer Architecture News, 27 (1): 31-34 (1999)Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation., , , , , , , and . IEEE Micro, 24 (6): 10-20 (2004)Using Low Cost Erasure and Error Correction Schemes to Improve Reliability of Commodity DRAM Systems., , , , , , and . IEEE Trans. Computers, 65 (12): 3766-3779 (2016)