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Disambiguation of "Mudge, Trevor N."

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Using Low Cost Erasure and Error Correction Schemes to Improve Reliability of Commodity DRAM Systems.

, , , , , , and . IEEE Trans. Computers, 65 (12): 3766-3779 (2016)

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Jan-Philipp Negel

Thin-disk multipass amplifier for fs pulses delivering 400 W of average and 2.0 GW of peak power for linear polarization as well as 235 W and 1.2 GW for radial polarization, , , , , , , and . Applied Physics. B, Lasers and optics, 123 (5): 156 (2017)

Michael Neubauer University of Stuttgart

Reflection-based Prototyping Framework for OPC UA Servers for Companion Specifications, , , , , and . 2023 IEEE International Conference on Industrial Technology (ICIT), (2023)

Jens Neubeck University of Stuttgart

Data Mining as an essential Tool for Data Driven Vehicle Development, , , and . 23. Internationales Stuttgarter Symposium : Automobil- und Motorentechnik, Springer Vieweg, (2023)

Univ. -Prof. Ph. D. Mathias Niepert University of Stuttgart

Approximate Answering of Graph Queries, , , , , , , , and . Compendium of Neurosymbolic Artificial Intelligence, 369, chapter 17, IOS Press, Amsterdam, (2023)

Dr. Rainer Nägele University of Stuttgart

Vernetzte Wertschöpfung : Was wir vom Persuasive Design für die Gestaltung der Ressourcenintegration in Service-Ökosystemen lernen können, , , and . Gestaltung des Wandels im Dienstleistungsmanagement, volume 1 : Innovationsperspektive - Digitalisierungsperspektive - Nachhaltigkeitsperspektive of Forum Dienstleistungsmanagement, Springer Gabler, Wiesbaden, (2023)
 

Other publications of authors with the same name

Virtual memory in contemporary microprocessors., and . IEEE Micro, 18 (4): 60-75 (1998)Mobile Supercomputers for the Next-Generation Cell Phone., , , and . IEEE Computer, 43 (1): 81-85 (2010)The Design of a Microsupercomputer., , , , , , , , and . IEEE Computer, 24 (1): 57-64 (1991)Using Graphics Processing Units in an LTE Base Station., , , , , , , and . Signal Processing Systems, 78 (1): 35-47 (2015)PowerFITS: Reduce Dynamic and Static I-Cache Power Using Application Specific Instruction Set Synthesis., , and . ISPASS, page 32-41. IEEE Computer Society, (2005)Architecture of a Hypercube Supercomputer., , and . ICPP, page 653-660. IEEE Computer Society Press, (1986)Evaluating private vs. shared last-level caches for energy efficiency in asymmetric multi-cores., , and . ICSAMOS, page 191-198. IEEE, (2014)PEPSC: A Power-Efficient Processor for Scientific Computing., , , and . PACT, page 101-110. IEEE Computer Society, (2011)Quantitative analysis and optimization techniques for on-chip cache leakage power., , and . IEEE Trans. VLSI Syst., 13 (10): 1147-1156 (2005)Sirius Implications for Future Warehouse-Scale Computers., , , , , , , , , and 1 other author(s). IEEE Micro, 36 (3): 42-53 (2016)