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Intelligent On/Off Link Management for On-chip Networks., , and . ISVLSI, page 343-344. IEEE Computer Society, (2011)A Novel System-Level On-Chip Resource Allocation Method for Manycore Architectures., , , and . ISVLSI, page 99-104. IEEE Computer Society, (2008)In-field vulnerability analysis of hardware-accelerated computer vision applications., , , , and . FPL, page 1-4. IEEE, (2015)Emulation-based hierarchical fault-injection framework for coarse-to-fine vulnerability analysis of hardware-accelerated approximate algorithms., , , , and . DATE, page 830-833. IEEE, (2016)Hardware Design Considerations for Edge-Accelerated Stereo Correspondence Algorithms., and . VLSI Design, (2012)Opportunities from the use of FPGAs as platforms for bioinformatics algorithms., , , , , , , , , and 2 other author(s). BIBE, page 559-565. IEEE Computer Society, (2012)Towards systolic hardware acceleration for local complexity analysis of massive genomic data., , and . ACM Great Lakes Symposium on VLSI, page 339-344. ACM, (2012)Deep Learning for Edge Computing: Current Trends, Cross-Layer Optimizations, and Open Research Challenges., , , , , , and . ISVLSI, page 553-559. IEEE, (2019)Edge Intelligence: Challenges and Opportunities of Near-Sensor Machine Learning Applications., , , and . ASAP, page 1-7. IEEE Computer Society, (2018)Intelligent NOC Hotspot Prediction., , and . ISVLSI (Selected papers), volume 105 of Lecture Notes in Electrical Engineering, page 3-16. Springer, (2010)