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A VLSI chip for the winograd/Prime factor algorithm to compute the discrete Fourier transform., and . IEEE Trans. Acoustics, Speech, and Signal Processing, 34 (4): 979-989 (1986)PERFLEX: a performance driven module generator., , and . EURO-DAC, page 154-159. IEEE Computer Society Press, (1992)Architectural Optimizations For A Floating Point Multiply-Accumulate Unit In A Graphics Pipeline., , , and . ASAP, page 65-71. IEEE Computer Society, (1996)An Architectural Design For Parallel Fractal Compression., , , and . ASAP, page 3-11. IEEE Computer Society, (1996)Being Stingy with Multipliers., and . IEEE Trans. Computers, 39 (6): 809-818 (1990)Techniques to Reduce the Inherent Limitations of Fully Digit On-Line Arithmetic.. IEEE Trans. Computers, 32 (4): 406-411 (1983)Fully Digit On-Line Networks., and . IEEE Trans. Computers, 32 (4): 402-406 (1983)Power-delay characteristics of CMOS adders., , and . IEEE Trans. VLSI Syst., 2 (3): 377-381 (1994)A fast algorithm for minimizing the Elmore delay to identified critical sinks., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 16 (7): 753-759 (1997)The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS., , , and . HICSS (1), page 96-104. IEEE Computer Society, (1994)