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Architectural Optimizations For A Floating Point Multiply-Accumulate Unit In A Graphics Pipeline.

, , , and . ASAP, page 65-71. IEEE Computer Society, (1996)

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Architectural Optimizations For A Floating Point Multiply-Accumulate Unit In A Graphics Pipeline., , , and . ASAP, page 65-71. IEEE Computer Society, (1996)An Architectural Design For Parallel Fractal Compression., , , and . ASAP, page 3-11. IEEE Computer Society, (1996)Architectures for wavelet transforms: A survey., , and . VLSI Signal Processing, 14 (2): 171-192 (1996)PERFLEX: a performance driven module generator., , and . EURO-DAC, page 154-159. IEEE Computer Society Press, (1992)The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS., , , and . HICSS (1), page 96-104. IEEE Computer Society, (1994)Power-delay characteristics of CMOS adders., , and . IEEE Trans. VLSI Syst., 2 (3): 377-381 (1994)A fast algorithm for minimizing the Elmore delay to identified critical sinks., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 16 (7): 753-759 (1997)Test generation in circuits constructed by input decomposition., , and . ICCD, page 107-111. IEEE Computer Society, (1990)Power comparisons for barrel shifters., , and . ISLPED, page 209-212. IEEE, (1996)A Massively Parallel, Micro-Grained VLSI Architecture., , and . VLSI Design, page 250-255. IEEE Computer Society, (1993)