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Disambiguation of "Xue, Chun Jason"

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Loop fusion and reordering for register file optimization on stream processors.

, , , and . Journal of Systems and Software, 85 (7): 1673-1681 (2012)

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Phi-Long Chung University of Stuttgart

Jason Kennedy Appelbaum University of Stuttgart

 

Other publications of authors with the same name

Optimizing parallelism for nested loops with iterational and instructional retiming., , , , and . J. Embedded Computing, 3 (1): 29-37 (2009)Software assisted non-volatile register reduction for energy harvesting based cyber-physical system., , , , , and . DATE, page 567-572. ACM, (2015)Minimizing WCET for Real-Time Embedded Systems via Static Instruction Cache Locking., , and . IEEE Real-Time and Embedded Technology and Applications Symposium, page 35-44. IEEE Computer Society, (2009)PRR: A low-overhead cache replacement algorithm for embedded processors., , , , and . ASP-DAC, page 35-40. IEEE, (2012)Compiler-assisted refresh minimization for volatile STT-RAM cache., , , , , and . ASP-DAC, page 273-278. IEEE, (2013)Non-volatile registers aware instruction selection for embedded systems., , , , and . RTCSA, page 1-9. IEEE Computer Society, (2014)Branch Prediction directed Dynamic instruction Cache Locking for embedded systems., , , and . RTCSA, page 209-216. IEEE Computer Society, (2013)Leveling to the last mile: Near-zero-cost bit level wear leveling for PCM-based main memory., , , and . ICCD, page 16-21. IEEE Computer Society, (2014)LADPM: Latency-Aware Dual-Partition Multicast Routing for Mesh-Based Network-on-Chips., , and . ICPADS, page 423-430. IEEE Computer Society, (2010)Joint task assignment and cache partitioning with cache locking for WCET minimization on MPSoC., , , and . J. Parallel Distrib. Comput., 71 (11): 1473-1483 (2011)