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An FPGA Architecture for the Recovery of WPA/WPA2 Keys.

T. Johnson, D. Roggow, P. Jones, and J. Zambreno. Journal of Circuits, Systems, and Computers, 24 (7): 1550105:1-1550105:26 (2015)

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Phillip Haag University of Stuttgart

Phillip Groß University of Stuttgart

H. Binz

Phillip Stephan University of Stuttgart

H. Bungartz

Other publications of authors with the same name

Scheduling Challenges in Mixed Critical Real-Time Heterogeneous Computing Platforms.C. Ng, S. Vyas, R. Cytron, C. Gill, J. Zambreno, and P. Jones. ICCS, volume 18 of Procedia Computer Science, page 1891-1898. Elsevier, (2013)Liquid Architecture.P. Jones, S. Padmanabhan, D. Rymarz, J. Maschmeyer, D. Schuehler, J. Lockwood, and R. Cytron. IPDPS Next Generation Software Program - NSFNGS - PI Workshop, IEEE Computer Society, (2004)Towards Hardware Support for Common Sensor Processing Tasks.A. Gupte, and P. Jones. RTCSA, page 85-90. IEEE Computer Society, (2009)A software configurable and parallelized coprocessor architecture for LQR control.P. Zhang, A. Mills, J. Zambreno, and P. Jones. ReConFig, page 1-8. IEEE, (2015)A Thermal Management and Profiling Method for Reconfigurable Hardware Applications.P. Jones, J. Lockwood, and Y. Cho. FPL, page 1-7. IEEE, (2006)A Configurable Architecture for Sparse LU Decomposition on Matrices with Arbitrary Patterns.X. Wang, P. Jones, and J. Zambreno. SIGARCH Computer Architecture News, 43 (4): 76-81 (2015)CyGraph: A Reconfigurable Architecture for Parallel Breadth-First Search.O. Attia, T. Johnson, K. Townsend, P. Jones, and J. Zambreno. IPDPS Workshops, page 228-235. IEEE Computer Society, (2014)A Scalable Unsegmented Multiport Memory for FPGA-Based Systems.K. Townsend, O. Attia, P. Jones, and J. Zambreno. Int. J. Reconfig. Comp., (2015)HW/SW Configurable LQG Controller using a Sequential Discrete Kalman Filter.M. Cauwels, J. Zambreno, and P. Jones. ReConFig, page 1-8. IEEE, (2018)A Runtime Configurable Hardware Architecture for Computing Histogram-Based Feature Descriptors.M. Qasaimeh, J. Zambreno, and P. Jones. FPL, page 351-354. IEEE Computer Society, (2018)

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Disambiguation of "Jones, Phillip H."

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An FPGA Architecture for the Recovery of WPA/WPA2 Keys.

Please choose a person to relate this publication to

Phillip Haag University of Stuttgart

Phillip Groß University of Stuttgart

H. Binz

Phillip Stephan University of Stuttgart

H. Bungartz

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Jones, Phillip H."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An FPGA Architecture for the Recovery of WPA/WPA2 Keys.

Please choose a person to relate this publication to

Phillip Haag University of Stuttgart

Phillip Groß University of Stuttgart

H. Binz

Phillip Stephan University of Stuttgart

H. Bungartz

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

An FPGA Architecture for the Recovery of WPA/WPA2 Keys.