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A reconfigurable multi-processor SoC for media applications.

M. Zhu, L. Liu, S. Yin, Y. Wang, W. Wang, and S. Wei. ISCAS, page 2011-2014. IEEE, (2010)

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Dexing Liu University of Stuttgart

Jan Liu University of Stuttgart

M.Sc. Zhuoran Liu University of Stuttgart

Yanchao Liu University of Stuttgart

Shuang Liu University of Stuttgart

Other publications of authors with the same name

Affine transformations for communication and reconfiguration optimization of loops on CGRAs.D. Liu, S. Yin, L. Liu, and S. Wei. ISCAS, page 2541-2544. IEEE, (2013)SPC: An Approach to Guarantee Performance in Cost Oriented Mapping Algorithm for NoC Architectures.Q. Wu, L. Liu, S. Yin, Y. Ren, and S. Wei. NAS, page 187-190. IEEE Computer Society, (2013)Optimizing Spatial Mapping of Nested Loop for Coarse-Grained Reconfigurable Architectures.D. Liu, S. Yin, Y. Peng, L. Liu, and S. Wei. IEEE Trans. VLSI Syst., 23 (11): 2581-2594 (2015)Energy Management on Battery-Powered Coarse-Grained Reconfigurable Platforms.P. Ouyang, S. Yin, L. Liu, and S. Wei. IEEE Trans. VLSI Syst., 23 (12): 3085-3098 (2015)A Hybrid Reconfigurable Architecture and Design Methods Aiming at Control-Intensive Kernels.J. Zhu, L. Liu, S. Yin, X. Yang, and S. Wei. IEEE Trans. VLSI Syst., 23 (9): 1700-1709 (2015)SimRPU: A Simulation Environment for Reconfigurable Architecture Exploration.L. Liu, D. Wang, S. Yin, Y. Chen, M. Zhu, and S. Wei. IEEE Trans. VLSI Syst., 22 (12): 2635-2648 (2014)Acceleration of Nested Conditionals on CGRAs via Trigger Scheme.S. Yin, P. Zhou, L. Liu, and S. Wei. ICCAD, page 597-604. IEEE, (2015)Joint affine transformation and loop pipelining for mapping nested loop on CGRAs.S. Yin, D. Liu, L. Liu, S. Wei, and Y. Guo. DATE, page 115-120. ACM, (2015)Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor.L. Liu, Y. Chen, D. Wang, S. Yin, X. Wang, L. Wang, H. Lei, P. Cao, and S. Wei. SCIENCE CHINA Information Sciences, 57 (8): 1-14 (2014)Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture.Y. Wang, L. Liu, S. Yin, M. Zhu, P. Cao, J. Yang, and S. Wei. SCIENCE CHINA Information Sciences, 56 (11): 1-20 (2013)

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Disambiguation of "Liu, Leibo"

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A reconfigurable multi-processor SoC for media applications.

Please choose a person to relate this publication to

Dexing Liu University of Stuttgart

Jan Liu University of Stuttgart

M.Sc. Zhuoran Liu University of Stuttgart

Yanchao Liu University of Stuttgart

Shuang Liu University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Liu, Leibo"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A reconfigurable multi-processor SoC for media applications.

Please choose a person to relate this publication to

Dexing Liu University of Stuttgart

Jan Liu University of Stuttgart

M.Sc. Zhuoran Liu University of Stuttgart

Yanchao Liu University of Stuttgart

Shuang Liu University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
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MSOffice XML

A reconfigurable multi-processor SoC for media applications.