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Data Backup Optimization for Nonvolatile SRAM in Energy Harvesting Sensor Nodes.

Y. Liu, J. Yue, H. Li, Q. Zhao, M. Zhao, C. Xue, G. Sun, M. Chang, and H. Yang. IEEE Trans. on CAD of Integrated Circuits and Systems, 36 (10): 1660-1673 (2017)

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M.Sc. Yunxuan Li University of Stuttgart

Yu Li University of Stuttgart

Zheng Li University of Stuttgart

Jie Li University of Stuttgart

Li Zhong University of Stuttgart

Other publications of authors with the same name

Self-powered wearable sensor node: Challenges and opportunities.Y. Liu, H. Li, X. Li, C. Xue, Y. Xie, and H. Yang. CASES, page 189. IEEE, (2015)PATH: Performance-Aware Task Scheduling for Energy-Harvesting Nonvolatile Processors.J. Li, Y. Liu, H. Li, Z. Yuan, C. Fu, J. Yue, X. Feng, C. Xue, J. Hu, and H. Yang. IEEE Trans. VLSI Syst., 26 (9): 1671-1684 (2018)Self-powered wearable sensor node: Challenges and opportunities.Y. Liu, H. Li, X. Li, J. Xue, Y. Xie, and H. Yang. CASES, page 189. IEEE, (2015)NVPsim: A simulator for architecture explorations of nonvolatile processors.Y. Gu, Y. Liu, Y. Wang, H. Li, and H. Yang. ASP-DAC, page 147-152. IEEE, (2016)CP-FPGA: Computation data-aware software/hardware co-design for nonvolatile FPGAs based on checkpointing techniques.Z. Yuan, Y. Liu, H. Li, and H. Yang. ASP-DAC, page 569-574. IEEE, (2016)SATS: An Ultra-Low Power Time Synchronization for Solar Energy Harvesting WSNs.T. Wu, Y. Liu, H. Li, C. Xue, H. Lee, and H. Yang. ISLPED, page 106-111. ACM, (2016)From device to system: cross-layer design exploration of racetrack memory.G. Sun, C. Zhang, H. Li, Y. Zhang, W. Zhang, Y. Gu, Y. Sun, J. Klein, D. Ravelosona, Y. Liu and 2 other author(s). DATE, page 1018-1023. ACM, (2015)Accurate personal ultraviolet dose estimation with multiple wearable sensors.J. Li, Y. Liu, H. Li, R. Hua, C. Xue, H. Lee, and H. Yang. BSN, page 347-352. IEEE, (2016)Data Backup Optimization for Nonvolatile SRAM in Energy Harvesting Sensor Nodes.Y. Liu, J. Yue, H. Li, Q. Zhao, M. Zhao, C. Xue, G. Sun, M. Chang, and H. Yang. IEEE Trans. on CAD of Integrated Circuits and Systems, 36 (10): 1660-1673 (2017)Checkpoint aware hybrid cache architecture for NV processor in energy harvesting powered systems.M. Xie, M. Zhao, C. Pan, H. Li, Y. Liu, Y. Zhang, C. Xue, and J. Hu. CODES+ISSS, page 22:1-22:10. ACM, (2016)